IEICE transactions on electronics

• 

  Año 2006, Vol. 89, Número 5

  • Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate

    K. H. Kim, H. Lee, Y. K. Choi

    pág. 578

    

  • A True 10-bit Data Driver LSI for HDTV TFT-LCDs

    J. H. Kim, O. K. Kwon, B. D. Choi

    pág. 585

    

  • High Performance Power MOSFETs by Wing-Cell Structure Design

    H. C. Chiu, F. T. Chien, C. N. Liao, C. L. Wang

    pág. 591

    

  • Ultrathin HfO~xN~y Gate Insulator Formation by Electron Cyclotron Resonance Ar/N~2 Plasma Nitridation of HfO~2 Thin Films

    S. I. Ohmi, T. Kurose

    pág. 596

    

  • 3D Inspection on Wafer Solder Bumps Using Binary Grating Projection in Integrated Circuit Manufacturing

    S. Yuan, D. Tian, Y. Zeng

    pág. 602

    

  • High Power GaN-HEMT for Wireless Base Station Applications

    T. Kikkawa, K. Joshin

    pág. 608

    

  • Comparative Study on Breakdown Characteristics for InGaAs Metamorphic High Electron Mobility Transistor and InGaAs/InP-Composite Channel Metamorphic High Electron Mobility Transistor

    B. O. Lim, S. W. Moon, D. H. Shin, S. D. Kim, S. G. Choi, J. H. Oh, B. H. Lee

    pág. 616

    

  • Multi-Stage, Multi-Way Microstrip Power Dividers with Broadband Properties

    M. Kishihara, I. Ohta, K. Yamane

    pág. 622

    

  • A 10b 100 MS/s 1.4 mm^2 56 mW 0.18 mum CMOS A/D Converter with 3-D Fully Symmetrical Capacitors

    H. W. Park, B. H. Min, Y. J. Cho, H. S. Chae

    pág. 630

    

  • An Embedded 8b 240 MS/s 1.36 mm^2 104 mW 0.18 mum CMOS ADC for DVDs with Dual-Mode Inputs

    H. C. Choi, Y. L. Kim, S. H. Lee, Y. J. Cho, S. W. Kim, K. H. Lee

    pág. 636

    

  • Diffraction Amplitudes from Pedriodic Neumann Surface: Low Grazing Limit of Incidence

    J. Nakayama, K. Hattori

    pág. 642

    

  • Implementation of the Perfect Matched Layer to the CIP Method

    Y. Ando, M. Hayakawa

    pág. 645

    

  • A Bootstrapped Switch for nMOS Reversible Energy Recovery Logic for Low-Voltage Applications

    S. Kim, S. I. Chae

    pág. 649

    

  • Instruction Based Synthesizable Testbench Architecture

    H. S. Choi, H. W. Choi, S. C. Park

    pág. 653