Resumen de Design and simulation of hybrid SET-CMOS inverter using macro-model technique

M.S. El Kazdir, M. Rzaizi, K. El Assali, D. Abouelaoualim

• The single-electron transistor (SET) is one of the state-of-the-art devices that can offer high operating speed with ultra-low power consumption. The SET macro-modeling, can be used for the simulation of a SET-CMOS logic circuit. In this work, we develop a new hybrid, SET-CMOS logic inverter macro-model whose effect is very useful in VLSI circuits design. All simulations are performed using the SIM-SCAPE environment of MATLAB SIMULINK. This architecture has been realized by implementing the NMOS logic of the conventional inverter with a SET macro-model. The simulation results show that the hybrid structure offers better performance. Indeed, the designed circuit is able to operate at room temperature.