Study of statistical variability in nanoscale transistors introduced by LER, RDF and MGG

• G. Indalecio ^[1] ; A. García-Loureiro ^[1] ; M. Aldegunde ; K. Kalna
  1. [1] Universidade de Santiago de Compostela

     Universidade de Santiago de Compostela

     Santiago de Compostela, España

     
• Localización: Proceedings of the 2013 Spanish Conference on Electron Devices / Héctor García (aut.), Helena Castán Lanaspa (aut.), 2013, ISBN 9781467346665
• Idioma: español
• Texto completo no disponible (Saber más ...)
• Resumen

  • A 3D drift-diffusion device simulator with implemented density-gradient quantum corrections is developed to run hundreds of simulations to gather variability characteristics in non-planar transistors. We have included the line edge roughness (LER), random dopants (RD), and metal gate granularity (MGG) induced variabilities, which are considered to be the most important sources of variability in device characteristics. The simulator is then applied to study a threshold voltage variability in a 25 nm gate length Si SOI FinFET due to LER and MGG. We found that the LER induced threshold variability has a mean value of 344.5 mV and σ of 4.7 mV while the MGG induced has a mean value of 349.9 mV and σ of 13.3 mV an order of magnitude greater than the LER variability.