China
Verification and validation represent an important procedure for model-based systems engineering design processes. One of the crucial tasks for verification and validation is to test whether the control system has reached performance limit. This is challenging since complicated theories and complex steps are often involved to achieve such an objective; meanwhile, the state of the art for testing performance limit requires iterative procedures. A simple and one-off experimental design for telling whether a control system reaches its performance limit is thus necessitated. This article introduces a remarkable test criterion for fulfilling the requirement. Both theoretical foundation and experiment design procedures are presented. Numerical examples are illustrated for the proposed method, where it is also shown that the simple method can be generalized to determining performance limit maps over both frequencies and physical parameters.
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