CMOS RF front-end receivers for DVB-SH
- Autores: Hugo García Vázquez
- Directores de la Tesis: Francisco Javier del Pino Suárez (dir. tes.), Sunil Lalchand Khemchandani (dir. tes.)
- Lectura: En la Universidad de Las Palmas de Gran Canaria ( España ) en 2014
- Idioma: español
- Tribunal Calificador de la Tesis: Antonio Hernández Ballester (presid.), Javier Agustín García García (secret.), Fortunato Carlos Augusto Dualibe (voc.), Emilio Migueláñez Martín (voc.), Clara Isabel Luján Martínez (voc.)
- Materias:
- Enlaces
- Tesis en acceso abierto en: acceda
- Resumen
Summary The aim of this research work is to present different alternatives for implementing power and area efficient RF receivers for Digital TV based on DV B-SH specifications. The results of the present work are integrated in an ambitious research project: RECITAL +, DV B-SH Digital TV Receiver, Spanish Ministry of Science and Innovation (TEC2008-06881-C03-01). In order to achieve the objective, the following milestones have been deterrnined and achieved: 1. Study of DV B-SH standard and proposal for an advanced. receiver ~~_'~'architecture. This receiver will be conceived so as to incorporate optimal solutions regarding power consumption. 2. Commercially available silicon technology selection. 3. Development (design, tape-out and measurement) of basic building blocks to be par! of the advanced DV B-SH receiver. In this regard, the design of the blocks that constitutes the RF front-end (LNAs, MIXERs) is proposed. 4. Integration and implementation of RF subsystems: the implementation of the chipset with the m inimum number of external components will be studied. TIhis work consists of five chapters, which are briefly outlined in this section. Chapter 1 (the current chapter) introduces the reader to DV B-SH standard, shows some possible commercial implementations and outlines the research objectives. After getting an insight into the research context, the system design is presented in Chapter 2. In this chapter the main requirements of DVB-SH are presented. With those requirements a reference system is designed. Also a Multi-Objective Optimization Method for block specification. Chapter 3 introduces the used technology and then goes on to analyse the circuits. After this theoretical analysis, the different implementations of the receivers developed are presented. Chapter 4 is devoted to modelling the package of a DV B-SH receiver using a 3D-EM simulator. Finally some conclusions and areas for further research are presented in Chapter 5.
