Monitor amb control strategies to reduce the impact of process variations in digital circuits

• Autores: Joan Mauricio Ferré
• Directores de la Tesis: Francesc Moll Echeto (dir. tes.)
• Lectura: En la Universitat Politècnica de Catalunya (UPC) ( España ) en 2015
• Idioma: inglés
• Tribunal Calificador de la Tesis: José Antonio Rubio Solà (presid.), David Gascón Fora (secret.), Miquel Ribó Pal (voc.)
• Programa de doctorado: Programa Oficial de Doctorado en Ingeniería Electrónica
• Materias:
  • Física
    • Electrónica
  • Ciencias tecnológicas
    • Tecnología electrónica
      • Diseño de circuitos
• Enlaces
  • Tesis en acceso abierto en: TDX
• Resumen

  • As CMOS technology scales down, Process, Voltage, Temperature and Ageing (PVTA) variations have an increasing impact on the performance and power consumption of electronic devices. These issues may hold back the continuous improvement of these devices in the near future. There are several ways to face the variability problem: to increase the operating margins of maximum clock frequency, the implementation of lithographic friendly layout styles, and the last one and the focus of this thesis, to adapt the circuit to its actual manufacturing and environment conditions by tuning some of the adjustable parameters once the circuit has been manufactured. The main challenge of this thesis is to develop a low-area variability compensation mechanism to automatically mitigate PVTA variations in run-time, i.e. while integrated circuit is running. This implies the development of a sensor to obtain the most accurate picture of variability, and the implementation of a control block to knob some of the electrical parameters of the circuit.