Hardware accelerators for embedded fingerprint-based personal recognition systems
- Autores: Mariano Fons Lluís
- Directores de la Tesis: Enrique Cantó (dir. tes.)
- Lectura: En la Universitat Rovira i Virgili ( España ) en 2012
- Idioma: inglés
- Tribunal Calificador de la Tesis: Ingrid Verbauwhede (presid.), Mariano López García (secret.), Raúl Sánchez Reillo (voc.)
- Materias:
- Enlaces
- Tesis en acceso abierto en: TDX
- Resumen
Abstract The development of automatic biometrics-based personal recognition systems is a reality in the current technological age. Not only those operations demanding stringent security levels but also many daily use consumer applications request the existence of computational platforms in charge of recognizing the identity of one individual based on the analysis of his/her physiological and/or behavioural characteristics. The state of the art points out two main open problems in the implementation of such applications: on the one hand, the needed reliability improvement in terms of recognition accuracy, overall security and real-time performances; and on the other hand, the cost reduction of those physical platforms in charge of the processing. This work aims at finding the proper system architecture able to address those limitations of current personal recognition applications. Embedded system solutions based on hardware-software co-design techniques and programmable (and run-time reconfigurable) logic devices under FPGAs or SOPCs is proven to be an efficient alternative to those existing multiprocessor systems based on HPCs, GPUs or PC platforms in the development of that kind of high-performance applications at low cost
