Characterization and compact modeling of flicker noise and piezoelectric effect in advanced field effect transistors
- Autores: Wondwosen Eshetu Muhea
- Directores de la Tesis: Benjamín Iñiguez Nicolau (dir. tes.)
- Lectura: En la Universitat Rovira i Virgili ( España ) en 2019
- Idioma: español
- Tribunal Calificador de la Tesis: David Jimenez Jimenez (presid.), Antonio Ramon Lázaro Guillén (secret.), Gérard Ghibaudo (voc.)
- Programa de doctorado: Programa de Doctorado en Tecnologías para Nanosistemas, Bioingeniería y Energía por la Universidad Rovira i Virgili
- Materias:
- Enlaces
- Tesis en acceso abierto en: TDX
- Resumen
The rapid advancements in material science are hugely helping the emergence of novel semiconductor devices. Moreover, the continuous shrinking of device dimensions is resulting in quite small devices that exhibit different electrical and physical properties. All these advances have left the microelectronics industry to deal with the challenges of understanding the physics of the resulting devices. Characterization and compact modeling of semiconductor devices play crucial roles in this regard bridging the gap between device fabrication and circuit design. This thesis focused on electrical characterization and compact modeling of amorphous InGaZnO TFTs, polymeric organic TFT devices, and GaN HEMTs.
The primary objectives have been: 1) Low frequency noise characterization of a-IGZO and Organic TFT devices over a broad range of biasing conditions. Based on these results, a complete model for the 1/f noise properties of the a-IGZO TFT valid for all device operating regimes is carried out. The measurement data analysis and the model derivation has been done based on the Universal Model Parameter Extraction Method (UMEM)-a technique developed explicitly for TFT device parameter extraction and classical 1/f noise models.
2) Development of Physically-based model for the piezoelectric effect in GaN-based HEMTs. Polarization dependent Vth expressions are derived and implemented in previously developed I-V model for simulations of DC characteristics of devices with different configurations (architectures).
3) Validate the developed models through comparison to experimental data.
Amorphous oxide semiconductors (AOS) are nowadays potential alternatives to Silicon in device applications. Novel AOS-based Thin film transistors (AOS TFTs) have emerged and spurred the design of transparent, large area, and flexible electronic circuits for envisioned technologies. Amorphous Indium-Zinc-Oxide (a-IGZO) TFTs are among this group of devices and received tremendous attention for almost two decades. They exhibit attractive features of high mobility of 10 cm2/Vs in the amorphous state, better bias stability, and low off-current. Furthermore, their amorphous nature enables better uniformity of device properties over a large area. These remarkable merits make a-IGZO TFTs potential substitutes for Silicon based TFT devices in the design of next-generation transparent and flexible electronics technologies. Thus, electrical characterization of these devices has been a subject of intense research in recent years. Several works have been published on fabrication and low-frequency noise characterization of a-IGZO TFTs that contributed to the solid knowledge of the device physics, operating principles, and carrier transport. However, the majority of the reported a-IGZO TFTs have a thick active layer (>=50 nm), and devices with a thin a-IGZO layer have been seldom investigated. Moreover, the analysis of I-V experimental data during device characterization has been made based on analytical models developed explicitly for crystalline MOSFETs. In contrast to that, a-IGZO TFTs with ESL structure and a thin active layer (12 nm) are investigated herein. The TFTs are fabricated by TNO research center, and they have 100 m width and 15-50 m gate lengths. By using AdMOS Flicker noise measurement system, the I-V and noise experimental data are obtained over a broad range of biasing conditions at 298, 315, and 333 K operating temperatures. With that, it was possible to accommodate device operation over three to four decades of drain current spanning, which is indispensable for the analysis of the origin of 1/f in the devices.
Analysis of the experimental data revealed that a high density of deep tail states exists in the active layer. Furthermore, the devices experienced a positive shift in their threshold voltage during the measurement of the transfer characteristics in the saturation regime. That might be attributed to the trapping of a considerable number of charge carriers by inter-grain traps present within the channel due to the application of higher drain voltage in earlier measurements. This effect can put the transistor into a state where it needs a higher gate bias to be ON, and consequently, cause the threshold voltage change. Secondly, in TFT devices with high deep tail states density, device operation in between the above threshold and the subthreshold regimes is dictated by the deep subgap states. It is highly probable that these deep states may act as acceptor-like dopants and impede the current flow. Thus, a higher gate voltage will be required to drive the transistors into operation. These effects appeared to be pronounced with the rise in device operating temperature and led to the increase in the threshold voltage with temperature. Furthermore, the increase in density of exponential shall tail states present around the conduction band edge with temperature indicated that Variable Range Hopping remains to be the primary conduction mechanism within the explored range of biases and operating conditions. The measured Flicker noise in the a-IGZO devices shows a 1/f behavior with a frequency exponent value between 0.9 and 1.1. Carrier number fluctuation-correlated mobility variation (CNF/CMF) is identified as the predominant mechanism of flicker noise in investigated devices, and no contribution from the contact resistance was observed. Based on these findings, a Flicker noise model was derived for the devices using the UMEM method and CNF/CMF noise modeling approaches. Model experimental data comparison validates both the DC and 1/f noise models over the entire device operation regimes and at elevated operating temperatures.
Similar to AOSs, Organic compound semiconductors (OCS) materials have been widely investigated to exploit their potential for opening exciting new avenues to practical applications in next-generation flexible and transparent electronics. However, issues such as efficient carrier injection and charge transport to and inside the organic materials are still under investigation. Researchers are striving to improve the performance of OTFTs by optimization of fabrication processes and trying different materials for the channel as well as the gate insulator. Thus, device characterization plays crucial roles in scrutinizing the improvements made in the new OTFTs. Low-frequency noise (LFN) characterization of polymeric organic thin film transistors had been covered in this thesis. The devices are fabricated by CEA-LITEN and contain SP500 organic polymer as a channel layer, and non-fluorinated organic dielectric material as gate insulators. The devices have 1 mm width and channel lengths ranging from 10-600 μm.
DC and 1/f noise experimental data analysis unveiled that the OTFTs exhibit higher carrier mobility in the order of 2-3 cm2/Vs. That might be attributed to the excellent optimization of the gate insulator to form a high-quality interface with the channel material, and positively influence the formation of grains at the interface to facilitate the hopping condition. It is also found that the deposition of a SAM layer on the gold contacts results in minimum contact resistances at the source/drain contacts of the OTFT devices. The experimental noise data analysis indicated a clear 1/f noise behavior with the frequency exponent close to unity. And, similar to the a-IGZO devices, carrier number fluctuation due to the dynamic exchange of charge carriers between gate oxide traps and the channel was found to be the source of the measured LFN. Neither the correlated mobility fluctuation nor defect induced traps created at source/drain contact electrodes contribute to 1/f noise generated within the devices. The interface trap density extracted from Flicker noise experimental data is comparable to values obtained in classical MOSFETs (in the order of magnitude of 109 cm-2eV-1). That proved the high quality and excellent repeatability of the dielectric/channel interface across all OTFTs in the sample.
Wide bandgap (WBG) semiconductors are another class of materials that caused explosive revolutions in the semiconductor industry. They are promising candidates to substitute Silicon in device applications for high power and micro to mm meter wave operation. Materials with exceptional attributes of high breakdown voltage, high carrier mobility, improved durability, and better reliability have brought about remarkable advances in power electronics, producing devices that are smaller, faster, and more efficient than Si-based counterparts. AlGaN/GaN HEMTs are among this class of devices. Owing to their outstanding electrical properties, GaN HEMTs have been acknowledged as a prime candidate for applications in high-temperature environments. The presence of high density of 2-D electron gas (2DEG) of 1013 cm-2 at the heterointerface is the key feature of this device. As the 2DEG electrons are spatially isolated, they exhibit high field effect mobility and saturation velocity, which makes AlGaN/GaN HEMTs better candidates to address the challenges that classical MOSFETs are currently facing in high power and high-frequency applications. Hence, an accurate compact physics-based model is required for investigating the potential of this device in circuits.
So far, compact models for GaN-based HEMTs have been proposed, and spontaneous and piezoelectric polarizations are accounted for in these models in a unified threshold voltage expression. However, the notable limitation of the expression is that the calculated and extracted Vth values are sufficiently far apart in devices with higher Al content. In this work, analytical expressions for the Schottky barrier height and the threshold voltage are derived by solving Poisson's equation in each layer in the HEMT stack, assuming that the 2DEG in GaN HETMs originate from the surface donor states located the barrier layer top. The model derivation takes into consideration the effects of GaN-cap layer, AlN interlayer, and barrier layer strain relaxation, which are the most important physical effects that the unified Vth expression does not accounted for. Calculated threshold voltages are found to be equivalent to values extracted from experimental data. Moreover, having the Vth models implemented in a current model previously developed by our group, simulation of devices I-V characteristics of varies HEMT structures have been carried out. The models are validated through comparison of model predictions to experimental data of practical devices over a feasible range of biasing conditions, and acceptable level of agreement is obtained in all cases.
