Resumen de Nueva técnica de estimación del consumo de potencia a alto nivel de descripción
With the increase of complexity in the integrated circuits, and the greater demand of portable applications, the power estimation has become a key factor in the design.
The impact of the power reduction techniques is especially significant in high levels of abstraction, reason why it becomes necessary on the part of the designer to have techniques of prediction of the consumption at the system and architecture levels.
At RTL level, the power consumption of the basic blocks is characterized by macro blocks, that depend on the statistical properties of the signals associated to this one block. Therefore, it is fundamental to have efficient technical and correct macro models to the characterization of the signals at RTL level (register transfer level).
In this thesis, a new methodology of power estimation for circuits appears at architecture and RTL level.
The presented methodology solves the propagation of the signals statistics of an efficient way. The technique is based on the characterization of these from a frecuencial point of view.
Also, a new method of system level characterization of the consumption, based on the norm of the signals and the transfer function, in such a way that it allows to facilitate, of an efficient way appears, the selection between different alternatives from design.
Different experimental results appear that they demonstrate the goodness of both methods, applied to circuits that incorporate as much nonlinear linear elements as. The results obtained with the propose technique are compared such with simulations made on circuits at transistor level, that allows to obtain a quite exact approach of the system power.
