Retinomorphic Chips that see Quadruple Images

K. Boahen

Voltage Gated Sodium Ion Channels: from Phenomena to Technology

J. Mortimer

A Reconfigurable Neuromorphic VLSI Multi-Chip System Applied to Visual Motion Computation

G. Indiveri, A. Whatley, J. Kramer

The Computational Infrastructure for Cellular Visual Microprocessors

P. Szolgay, A. Zarandy, S. Zold, T. Roska, P. Foldesy, L. Kék, T. Kozek, K. László, I. Petrás, Csaba Rekeczky, I. Szatmári, D. Bálya

Reaction-Diffusion CNN Design for a New Class of Biologically-Inspired Processors in Artificial Locomotion Applications

M. Branciforte, G. Di Bernardo, F. Doddo, L. Occhipinti

Using Analogue VLSI Leaky Integrate-and-Fire Neurons in a Sound Analysis System

M. Glover, A. Hamilton, L. Smith

Sound Source Localization with an Integrate-and-Fire Neural System

R. Izak, G. Scarbata, P. Paschke

New Developments for High Performance Implantable Stimulators: first 3 Mbps up to 4.46 Mbps Demodulator Chip through a Wireless Transcutaneous Link

D. Marin, M. Troosters, I. Martinez, E. Valderrama, J. Aguiló

An Experimental Analog CMOS Self-Learning Chip

G. Bo, D. Caviglia, H. Chiblè, M. Valle

VLSI Implementation of Fuzzy Adaptive Resonance and Learning Vector Quantization

J. Lubkin, Gert Cauwenberghs

Approaching Evolvable Hardware to Reality: the Role of Dynamic Reconfiguration and Virtual Meso-Structures

J. Moreno, Joan Cabestany Moncusí, Jordi Madrenas Boadas, E. Cantó, J. Faura, J. Insenser

An Evolvable Hardware Chip for Prosthetic Hand Controller

Isamu Kajitani, M. Murakawa, Daisuke Nishikawa, H. Yokoi, M. Kajihara, M. Iwata, D. Keymeulen, H. Sakanashi, T. Higuchi

A PCI Bus based Correlation Matrix Memory and its Application to k-NN Classification

P. Zhou, J. Austin

Design and Prototyping of a MEMS-Oriented Distributed Feed-Back Processor

Y. Mita, A. Kaiser, P. Garda, Maurice Milgram, H. Fujita

Asymmetrical Filters for Vision Chips: a Basis for the Design of Large Sets of Spatial and Spatiotemporal Filters

A. Torralba, J. Hérault

Analog MOS Circuit Systems Performing the Visual Tracking with Bio-Inspired Simple Networks

T. Asai, M. Ohtani, Hiroo Yonezu, Y. N. Ohshima

Nonlinear Dynamical Systems utilizing Pulse Modulation Signals and a CMOS Chip Generating Arbitrary Chaos

T. Morie, S. Sakabayashi, M. Nagata, A. Iwata

Switched-Capacitor Multi-Internal-State Chaotic Neuron Circuit with Unipolar and Bipolar Output Functions

Y. Horio, I. Kobayashi, M. Kawakami, H. Hayashi, Kazuyuki Aihara

Design cf Very High Speed CMOS Fuzzy Processors for Applications in High Energy Physics Experiments

D. Falchieri, A. Gabrielli, Emiliano Gandolfi, M. Masetti

Mixed NIode VLSI Implementation of a Neural Associative Memory

A. Heittmann, Ulrich Rückert

A Flexible Hardware Architecture for Online Hebbian Learning in the Sender-Oriented PCNN-Neurocomputer Spike 128K

M. Schäfer, G. Hartmann

An HWKW CO-Design Approach for Neuro-Fuzzy Hardware Design

M. Chiaberge, E. Miranda, L. M. Reyneri

Backpropagation Training of an Optical Neural Network

J. Steck, S. Skinner, A. Cruz Cabrera, M. Yang, E. Behrman

Design of Complementary Low-Power CMOS Architectures for Looser-take-all and Winner-take-all

N. Donckers, Fortunato Carlos Augusto Dualibe, Michel Verleysen

VLSI Implementation of a Binary Neural Network - Two Case Studies

A. Bermak, J. Austin

Systolic Implementation of a Pipelined On-Line Backpropagation

R. Gironés, A. Salcedo

A VLSI Implementation of a Neuromorphic Network for Scene Segmentation

Jordi Cosp Vilella, J. Madrenas, Joan Cabestany Moncusí

A 2D Image Filtering Architecture for Real-Time Vision Processing Systems

María Teresa Serrano Gotarredona, Andreou Andreou, Bernabe Linares Barranco