Brain Computer Interfaces (BCI) processing algorithms needs powerful computational devices to perform in real time. In this work, a hardware efficient design for the classification of Electroencephalography (EEG) signals representative of two motor imagery task is proposed and implemented on Field Programmable Gate Array (FPGA). Using as feature extraction algorithm, Wavelet Package Decomposition (WPD) and Linear Discriminant Analysis (LDA) as the classifier. Achieving an accuracy of 80 % in the classification of the two tasks. The system was designed using System Generator and implemented on a Zybo board using Hardware/Software Co-Simulation. The accuracy, latency, resources and power consumption was analyzed and compared with previous works.
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