Towards high-k integration with III-V channels: Interface optimization of high pressure sputtered gadolinium oxide on indium phospide

• E. San Andrés ^[1] ; M. A. Pampillón ^[1] ; C. Cañadilla ^[1] ; P. C. Feijoo ^[1] ; A. del Prado ^[1]
  1. [1] Universidad Complutense de Madrid

     Universidad Complutense de Madrid

     Madrid, España

     
• Localización: Proceedings of the 2013 Spanish Conference on Electron Devices / Héctor García (aut.), Helena Castán Lanaspa (aut.), 2013, ISBN 9781467346665
• Idioma: español
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• Resumen

  • We studied the electrical properties of metal-oxide-semiconductor devices based on Gd 2 O 3 deposited on InP by high pressure sputtering and a novel plasma oxidation process. The resulting devices show fully functional capacitance curves., indicating an unpinned Fermi level. The samples were annealed in forming gas at temperatures up to 550°C. We studied the interface trap density of the devices. We found out that with increasing annealing temperature the defect content decreases but at 550°C the capacitance drops and the leakage current increases., indicating a dielectric degradation.