A fault manager for digital VLSI circuits

• Autores: A. Lyoi, M. Oreglia
• Localización: Mini and Microcomputers and their applications / Emilio Luque Fadón (ed. lit.), 1988, págs. 45-47
• Idioma: inglés
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• Resumen

  • This paper introduces the Fault Manager, an effective tool to generate targer fault sets for fault simulation and test pattern generation. Its innovative features are the uniform fault model for mixed-level circuits, a fast collapsing algoritm, and a flexible user-friend interface allowing different types of fault selection to be performed.