1D&2D FHT for real time video data processing

• Juan A. Mitchell ^[1] ; Ángel M. Burón ^[1] ; José M. Solana ^[1]
  1. [1] Universidad de Cantabria

     Universidad de Cantabria

     Santander, España

     
• Localización: Mini and Microcomputers and their applications / Emilio Luque Fadón (ed. lit.), 1988, págs. 600-604
• Idioma: inglés
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• Resumen

  • After introducing the formulation for the Discrete Haar Transform (DHT) in one and in two dimensions, a three stage pipeline herdware architecture is presented for implementing the 1D-fht; included in it there is a register file for storage of intermediate data having being its structure and operation "tailored to the algorithm". Also, a recursive computational scheme for the 2D-FHT requiring only two computational building blocks is presented, and because of its low complexity, susceptible of being included on a simple single ASIC.