Technology scaling implications for BTI reliability

• Autores: S.M. Ramey, C. Prasad, A. Rahman
• Localización: Microelectronics reliability, ISSN 0026-2714, Nº. 82, 2018, págs. 42-50
• Idioma: inglés
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• Resumen

  • BTI has long been a concern for transistor reliability, and as such garnered significant attention for process optimization and qualification. Typically, the details of a given technology are reported in the literature at the time of qualification. However, not much attention is paid to the larger trends that emerge generation to generation. In this work, we describe the trends when scaling from the 90 nm to 14 nm technology nodes, detail the implications of scaling and architecture changes, as well as discuss the challenges associated with modeling BTI as technologies evolve.