Miquel Nicolau Vila, Teodor Jové Lagunas
Although new architectures allos a throughput of more than on instruction per clock cycle, the machine parallelism supported by these parallel architectures is usually much greater than the average instruction parallelism obtained in real execution. This limitation is basically due to control and data dependencies of sequential programs. Allowing concurrent execution of independent instruction streams on a single processor, increases the probability of finding dependency-free instructions that can be executed in parallel, which improves the degree of execution parallelism and functional units' utilization. Dynamic selection of instructions from the different instruction stream can direct the fetch policy in order to better exploit the machine parallelism. In this paper, different selection schemes to increase processor performance are proposed. These schemes offer better use of instruction buffer capacity in order to decrease the number of fetch stalls
© 2001-2024 Fundación Dialnet · Todos los derechos reservados