Analytical drain current model for nanoscale strained‐Si/SiGe MOSFETs
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Himanshu Batwani [1]
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[1] Indian Institute of Technology
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- Localización: Compel: International journal for computation and mathematics in electrical and electronic engineering, ISSN 0332-1649, Vol. 28, Nº 2, 2009, págs. 353-371
- Idioma: inglés
- Enlaces
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Resumen
Purpose – The purpose of this paper is to present an analytical drain current model for output characteristics of strained‐Si/SiGe bulk MOSFET.
Design/methodology/approach – A physics‐based model for current output characteristics and transconductance of strained‐Si/SiGe bulk devices has been developed incorporating the impact of strain (in terms of equivalent Ge mole fraction), strained silicon thin film thickness, gate work function, channel length and other device parameters. The accuracy of the results obtained using this model is verified by comparing them with 2D device simulations.
Findings – This model correctly predicts the output characteristics, IDS−VGS characteristics, transconductance and output conductance of the strained‐Si/SiGe MOSFET and demonstrates a significant enhancement in the drain current of the MOSFET with increasing strain in the strained‐Si thin film, i.e. with increasing equivalent Ge concentration in the SiGe bulk.
Research limitations/implications – Can be implemented in a SPICE like simulator for studying circuit behaviour containing strained‐Si/SiGe bulk MOSFETs.
Practical implications – The model discussed in this paper can be easily implemented in a circuit simulator and used for the characterization of strained silicon devices. This complements the recent trend of investigation of new materials and device structures to maintain the rate of advancement in VLSI technology.
Originality/value – This paper presents, for the first time, a compact surface potential‐based analytical model for strained‐Si/SiGe MOSFETs which predicts the device characteristics reasonably well over their range of operation.
