Deep trap-induced dynamic on-resistance degradation in GaN-on-Si power MISHEMTs

• Autores: A. Sasikumar, A.R. Arehart, D.W. Cardwell, C.M. Jackson, W. Sun, Z. Zhang, S.A. Ringel
• Localización: Microelectronics reliability, ISSN 0026-2714, Nº. 56, 2016, págs. 37-44
• Idioma: inglés
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• Resumen

  • AbstracIdentification and characterization of a single, deep trap causing large increases in the on-resistance of GaN-on-Si power metal-insulator-semiconductor-high electron mobility transistors (MISHEMTs) is reported. This is achieved by using HEMT-based deep level optical spectroscopy (DLOS) and related methods in conjunction with high voltage off-state VDS switching up to 400 V. A trap with an activation energy of ~ EC − 2 eV that is physically located in the drain-access region of the MISHEMT is shown to be the primary source of an increase of the dynamic on-resistance increase by as much as ~ 9 times at 400 V operation. Comparisons of trap signatures extracted from the MISHEMT with capacitance-based DLOS measurements of simple Schottky-diode test-structures showing the same, dominant trap signature suggests that the physical defect is located within the GaN buffer and is not a surface or insulator-related defect. A buffer trap based model is presented to explain the observed on-resistance degradation effects in the MISHEMTs during high voltage switching.