IEE Proceedings: Computers and digital techniques

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  Año 2004, Vol. 151, Número 1

  • Low-power system-on-chip architecture for wireless LANs

    L. Bisdounis

    págs. 2-16

    

  • Simultaneous routing and buffering in SOC floorplan design

    J. P. Fang, Y.-S. Tong, S.-J. Chen

    págs. 17-22

    

  • Architectural probing: a new paradigm for enabling communication refinement in SOC design

    C. He, M. Lajolo, M. Jacome

    págs. 23-32

    

  • Energy-efficient Java execution using local memory and object co-location

    N. Vijaykrishnan, S. Tomar, S. Kim

    págs. 33-42

    

  • dMT: inexpensive throughput enhancement in small-scale embedded microprocessors with differential multithreading

    J. W. Haskins, K. R. Hirst

    págs. 43-50

    

  • Data-adaptive motion estimation algorithm and VLSI architecture design for low-power video systems

    L. Fanucci, S. Saponara

    págs. 51-60

    

  • Finite state machine state assignment targeting low power consumption

    S. Chattopadhyay

    págs. 61-70

    

  • Formal verification of a SONET data stream processor

    S. Tahar, M. H. Zobair

    págs. 71-82

    

  • Testing of stuck-open faults in generalised Reed-Muller and EXOR sum-of-products CMOS circuits

    B. B. Bhattacharya, D. K. Das, H. Rahaman

    págs. 83-91