On the Processor Scheduling Problem in Time Warp Synchronization
pág. 143
Parallel Simulation of Chip-Multiprocessor Architectures
pág. 176
Rapid Model Parameterization from Traffic Measurements
pág. 201
A Two-Stage Modeling and Simulation Process for Web-Based Modeling and Simulation
pág. 230
© 2001-2024 Fundación Dialnet · Todos los derechos reservados
Coordinado por: