High-security asynchronous circuit implementation of AES
D. Sokolov, A. Koelmans, F. Burns, A. Yakovlev, A. Bystrov, D. Shang
págs. 71-77
Efficient power modelling approach of sequential circuits using recurrent neural networks
C.-N.J. Liu, C.-C. Shiue, W.-T. Hsieh
págs. 78-86
págs. 87-92
Low-power bus encoding with crosstalk delay elimination
T. Kim, C.-G. Lyuh
págs. 93-100
Low power system on chip bus encoding scheme with crosstalk noise reduction capability
Z. Khan, T. Arslan, A.T. Erdogan
págs. 101-108
D.K. Das, H. Rahaman
págs. 109-116
Dynamic tree reconstruction with application to timing-constrained congestion-driven global routing
J.-T. Yan
págs. 117-129
págs. 130-136
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