Cmos design for intersymbol interference cancellation in high-speed serial communications

• Autores: Javier Aguirre Olcoz
• Directores de la Tesis: Santiago Celma (dir. tes.), Carlos Sánchez Azqueta (dir. tes.)
• Lectura: En la Universidad de Zaragoza ( España ) en 2017
• Idioma: español
• Tribunal Calificador de la Tesis: Manuel Lozano Fantoba (presid.), Francisco Aznar Tabuenca (secret.), Cecilia Gimeno Gasca (voc.), Pedro Antonio Martínez Martínez (voc.), Antonio José Acosta Jiménez (voc.)
• Programa de doctorado: Programa Oficial de Doctorado en Física
• Materias:
  • Física
    • Electrónica
      • Circuitos integrados
  • Ciencias tecnológicas
    • Tecnología electrónica
      • Diseño de circuitos
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• Resumen

  • In a digital communications system, intersymbol interference is an overlapping in time between consecutive transmitted bits. It is a major drawback in high-speed serial links, which must be cancelled to achieve an error-free communication between a transmitter and a receiver.

    CMOS Design for Intersymbol Interference Cancellation in High-Speed Serial Communications explores different techniques to cancel intersymbol interference in multigigabit applications, focusing on duobinary baseband modulation. Using this technique, an excellent trade-off between speed, signal integrity and power consumption is achieved. Two different prototypes working at 3.125 Gbps and 10 Gbps are demonstrated using, respectively, a bulk CMOS and a silicon on insulator CMOS process.